The present invention relates generally to reducing contact resistance in integrated circuits, and in particular to the development of compound structures and processes for reducing contact resistance with attendant thermal tolerance, as well as integrated circuit devices utilizing such structures and processes.
Electronic information handling or computer systems, whether large machines, microcomputers or small and simple digital processing devices, require memory for storing data and program instructions. Various memory systems have been developed over the years to address the evolving needs of information handling systems. One such memory system includes semiconductor memory devices.
Computer, communication and industrial applications are driving the demand for memory devices in a variety of electronic systems. One important form of semiconductor memory device includes Dynamic Random Access Memory (DRAM). A typical DRAM includes an array of memory cells. Each memory cell includes a capacitor that stores the data in the cell and a transistor that controls access to the data. The charge stored across the capacitor is representative of a data bit.
Data can be either stored in the memory cells during a write mode, or data may be retrieved from the memory cells during a read mode. The data is transmitted on signal lines, referred to as bit lines, which are coupled to input/output (I/O) lines through transistors used as switching devices. Typically, for each bit of data stored, its true logic state is available on an I/O line and its complementary logic state is available on an I/O complement line.
The memory cells are typically arranged in an array and each cell has an address identifying its location in the array. The array includes a configuration of intersecting conductive lines and memory cells are associated with the intersections of the lines. In order to read from or write to a cell, the particular cell in question must be selected, or addressed. The address for the selected cell is represented by input signals to an address decoder. In response to the decoded address, row access circuitry activates a word line. The selected word line activates the access transistors for each of the memory cells in communication with the selected word line. In response to the decoded column address, column access circuitry selects a bit line. For a read operation, the selected word line activates the access transistors for a given word line address, and data is latched to the selected bit line.
Designers are under constant pressure to increase memory cell density to reduce costs and increase performance. As memory cell density is increased, memory cell size is generally decreased. As memory cell size decreases, contact resistance becomes more critical as the cross-sectional area for current flow decreases. As an example, a metal-containing bit line may make contact to a source/drain region of an access transistor through a polysilicon contact plug. To improve contact resistance between the bit line and the contact plug, a titanium silicide interface is often formed for good ohmic contact between the metal of the bit line and the polysilicon of the contact plug. However, this titanium silicide interface is susceptible to agglomeration if the device is exposed to high temperatures. Such high temperatures are routine in semiconductor processing such as Rapid Thermal Processing (RTP). The risk of agglomeration increases as the thickness of the silicide layer increases. Agglomeration of the titanium silicide or other refractory metal silicide can cause delamination of the bit line, resulting in increased contact resistance.
For the reasons stated above, and for other reasons stated below that will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative structures and processes for improving contact resistance in integrated circuit devices.
Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material and a second refractory metal material overlying the first refractory metal material. Each refractory metal material is a conductive material containing a refractory metal and an impurity capable of forming a chemical bond with the refractory metal. The first refractory metal material is a metal-rich material, containing a level of its impurity at less than a stoichiometric amount. The second refractory metal material has a lower affinity for the impurities than does the first refractory metal material. As such, the second refractory metal material can serve as an impurity donor during an anneal or other exposure to heat. This net migration of the impurities from the second refractory metal material to the first refractory metal material limits growth of a metal silicide interface between the first refractory metal material and the underlying silicon-containing material, thereby providing ohmic contact with attendant thermal tolerance.
A variety of impurities can be used to form chemical bonds with refractory metals to produce a conductive material. Examples include boron (B), carbon (C), nitrogen (N2) and oxygen (O2). Each refractory metal material can use the same or different impurities. The choice of impurity is dependent upon the choice of refractory metals as some impurities may form dielectric materials when reacted with the refractory metal. For example a titanium dioxide material is generally considered to have dielectric properties while a tungsten dioxide material is generally considered to have conductive properties.
One class of embodiments uses nitrogen as the impurity for both the first and second refractory metal materials. Such embodiment include a first refractory metal nitride layer overlying a silicon-containing material and a second refractory metal nitride layer overlying the first refractory metal nitride layer. The first refractory metal nitride layer is an unsaturated or metal-rich nitride material. The first refractory metal nitride layer preferably has a bulk resistivity near its unsaturated maximum bulk resistivity. The second refractory metal nitride layer has a lower affinity for nitrogen than the unsaturated first refractory metal nitride layer. In this manner, the first refractory metal nitride layer can accept nitrogen from the second refractory metal nitride layer during an anneal or other exposure to heat. The migration of nitrogen from the second refractory metal nitride layer to the first refractory metal nitride layer limits growth of a metal silicide interface between the first refractory metal nitride layer and the underlying silicon-containing material, thereby providing ohmic contact with attendant thermal tolerance.
For one embodiment, the invention provides a compound structure for reduced contact resistance to a silicon-containing material. The compound structure includes a first refractory metal material overlying the silicon-containing material, wherein the first refractory metal material contains a first refractory metal and a first impurity. The first impurity is capable of forming a chemical bond with the first refractory metal and is contained in the first refractory metal material at a level less than a stoichiometric level. The compound structure further includes a second refractory metal material overlying the first refractory metal material. The second refractory metal material contains a second refractory metal and a second impurity capable of forming a chemical bond with the second refractory metal. The second refractory metal material has a lower affinity for the impurities than does the first refractory metal material.
For another embodiment, the invention provides a compound structure for reduced contact resistance to a silicon-containing material. The compound structure includes a first refractory metal nitride layer overlying the silicon-containing material, wherein the first refractory metal nitride layer is an unsaturated refractory metal nitride material. The compound structure further includes a second refractory metal nitride layer overlying the first refractory metal nitride layer, wherein the second refractory metal nitride layer has a lower affinity for nitrogen than the first refractory metal nitride layer.
For yet another embodiment, the invention provides a compound structure for reduced contact resistance to a silicon-containing material. The compound structure includes a titanium nitride layer overlying the silicon-containing material, wherein the titanium nitride layer is formed by reactive sputtering from a titanium target in a nitrogen-containing ambient to produce an unsaturated titanium nitride material having a bulk resistivity within 15% of a maximum unsaturated bulk resistivity. The compound structure further includes a refractory metal nitride layer overlying the titanium nitride layer. For a further embodiment, the refractory metal nitride layer is a saturated refractory metal nitride material. For a still further embodiment, the refractory metal nitride layer has a lower affinity for nitrogen than the titanium nitride layer.
For still another embodiment, the invention provides a compound structure for reduced contact resistance to a silicon-containing material. The compound structure includes a titanium nitride layer overlying the silicon-containing material, wherein the titanium nitride layer is formed by reactive sputtering from a titanium target in a nitrogen-containing ambient to produce an unsaturated titanium nitride material of the form TiNx where x is in the range of approximately 0.2 to approximately 0.8. The compound structure further includes a refractory metal nitride layer overlying the titanium nitride layer. For a further embodiment, the refractory metal nitride layer is a saturated refractory metal nitride material. For a still further embodiment, the refractory metal nitride layer has a lower affinity for nitrogen than the titanium nitride layer.
For a further embodiment, the invention provides a bit-line contact. The bit-line contact includes a titanium nitride layer adjoining a silicon-containing material, wherein the titanium nitride layer is formed by a physical vapor deposition process to be an unsaturated titanium nitride material and to have a bulk resistivity within 15% of a maximum unsaturated bulk resistivity. The bit-line contact further includes a tungsten nitride layer overlying the titanium nitride layer.
For a still further embodiment, the invention provides a word line for a memory cell. The word line include a gate dielectric layer, a gate polysilicon layer overlying the gate dielectric layer, an unsaturated titanium nitride layer overlying the gate polysilicon layer, a tungsten nitride layer overlying the titanium nitride layer, and a gate conductor layer overlying the tungsten nitride layer. For one embodiment, the tungsten nitride layer has a lower affinity for nitrogen than the unsaturated titanium nitride layer. For another embodiment, the unsaturated titanium nitride layer has a bulk resistivity within 15% of its unsaturated maximum bulk resistivity.
For one embodiment, the invention provides a memory cell. The memory cell includes a gate stack overlying a silicon substrate and a first source/drain region and a second source/drain region in the silicon substrate on opposing sides of the gate stack. The memory cell further includes a capacitor having a bottom plate, a top plate and a dielectric layer interposed between the bottom plate and the top plate. The memory cell still further includes a titanium nitride layer adjoining a silicon-containing material, wherein the titanium nitride layer is formed by reactive sputtering from a titanium target in a nitrogen-containing ambient to produce an unsaturated titanium nitride material having a bulk resistivity within 15% of a maximum unsaturated bulk resistivity. The silicon-containing material may be either the first source/drain region or a silicon-containing contact plug adjoining the first source/drain region. The memory cell still further includes a refractory metal nitride layer overlying the titanium nitride layer, wherein the refractory metal nitride layer is coupled to the bottom plate of the capacitor.
For another embodiment, the invention provides a method of reducing contact resistance to a silicon-containing material. The method includes forming a first refractory metal nitride layer on the silicon-containing material, wherein the first refractory metal nitride layer is an unsaturated refractory metal nitride material. The method further includes forming a second refractory metal nitride layer on the first refractory metal nitride layer, wherein the second refractory metal nitride layer has a lower affinity for nitrogen than the first refractory metal nitride layer. The method still further includes annealing to form a refractory metal silicide interface between the first refractory metal nitride layer and the silicon-containing material.
For yet another embodiment, the invention provides a method of reducing contact resistance to a silicon-containing material. The method includes forming an unsaturated titanium nitride layer on the silicon-containing material using an ionized metal plasma process in a nitrogen-containing ambient. The method further includes forming a tungsten nitride layer on the titanium nitride layer. The method still further includes annealing to form a refractory metal silicide interface between the titanium nitride layer and the silicon-containing material.
Further embodiments of the invention include compound structures and methods of varying scope, as well as apparatus and systems making use of such compound structures and methods.